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HT761X
General Purpose PIR Controller
Features
* * * * * * * * * *
Stand-by current: 100A (Typ.) On-chip regulator Adjustable output duration CDS input 40 second warm-up ON/AUTO/OFF selectable by MODE pin
Override function Auto-reset if the ZC signal disappears over 3 seconds Operating voltage: 5V~12V 16 pin DIP or SOP packaging
Applications
* *
PIR light controllers Motion detectors
* *
Alarm systems Auto door bells
General Description
The HT761X is a CMOS LSI chip designed for use in automatic PIR lamp control. It can operate with a 2-wire configuration for triac applications or with a 3-wire configuration for relay applications. The chip is equipped with operational amplifiers, a comparator, timer, a zero crossing detector, control circuit, a voltage regulator, a system oscillator, and an output timing oscillator. Its PIR sensor detects infrared power variations induced by the motion of a human body and transforms it to a voltage variation. If the PIR output voltage variation conforms to the criteria (refer to the functional description), the lamp is turned on with an adjustable duration. The HT761X offers three operating modes (ON, AUTO, OFF) which can be set through the MODE pin. While the chip is working in the AUTO mode the user can override it and switch to the TEST mode, or manual ON mode, or return to the AUTO mode by switching the power switch. The chip is enclosed in a 16 pin DIP/SOP.
Selection Table
Part Number ZC off/on for override
2 times 1 time
Flash on mode autochange
Flash No flash
Override ON duration
8 hrs 8 hrs
Comparator Effective window trigger width
1 (VDD-VEE) 16 1 (VDD-VEE) 16 >24ms >24ms
HT7610 HT7611
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HT761X
Pin Assignment
Block Diagram
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HT761X
Pin Description
Pin No. A
1 2 2
Pin Name
VSS RELAY TRIAC
I/O
I O O
B
1
Internal Connection
-- CMOS CMOS PMOS IN NMOS OUT
Description
Negative power supply RELAY drive output through an external NPN transistor, active high TRIAC drive output The output is a pulse output when active. Output timing oscillator I/O It is connected to an external RC to adjust output duration. System oscillator I/O OSCS is connected to an external RC to set the system frequency. The system frequency 16KHz for normal application. Input for AC zero crossing detection CDS is connected to a CDS voltage divider for daytime/night auto-detection. Low input to this pin can disable the PIR input. CDS a schmitt trigger input with 5-second input debounce time. Operating mode selection input: VDD: Output is always ON VSS: Output is always OFF Open: Auto detection Positive power supply Regulated voltage output The output voltage is about -4V with respect to VDD. Chip reset input, active low Noninverting input of OP1 Inverting input of OP1 Output of OP1 Noninverting input of OP2 Inverting input of OP2 Output of OP2
3
3
OSCD
I/O
4
4
OSCS
I/O
PMOS IN NMOS OUT CMOS
5
5
ZC
I
6
6
CDS
I
CMOS
7
7
MODE
I
CMOS
8 9 10 11 12 13 14 15 16
8 9 10 11 12 13 14 15 16
VDD VEE RSTB OP1P OP1N OP1O OP2P OP2N OP2O
I O I I I O I I O
-- NMOS Pull-High PMOS PMOS NMOS PMOS PMOS NMOS
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Absolute Maximum Ratings
Supply Voltage ............................... -0.3V to 13V Input Voltage................. VSS-0.3V to VDD+0.3V Storage Temperature................. -50C to 125C Operating Temperature............... -25C to 75C Zero Crossing Current.....................max. 300A
Electrical Characteristics
Symbol
VDD VEE IDD VTH1 VTL1 IOH1 IOL1 IOL2 VIH VIL VTH2 VTL2 FSYS Fd AVO VOS
Parameter
Operating Voltage Regulator Output Voltage Operating Current CDS "H" Transfer Voltage CDS "L" Transfer Voltage OUTPUT Source Current (RELAY, TRIAC) OUTPUT Sink Current (RELAY, TRIAC) VEE Sink Current "H" Input Voltage "L" Input Voltage ZC "H" Transfer Voltage ZC "L" Transfer Voltage System Oscillator Frequency Delay Oscillator Frequency OP Amp Open Loop Gain OP Amp Input Offset Voltage --
Test Condition VDD Condition
-- VDD-VEE No load, OSC on -- -- VOH=10.8V VOL=1.2V VDD-VEE=4V -- -- -- -- ROSCS=560K COSCS=100P ROSCD=560K COSCD=100P No load No load
Min.
5 3.5 -- 6.4 3.7 -6 40 -- 0.8VDD -- 4.7 1.3 12.8 12.8 60 --
Typ.
9 4 100 8 4.7 -12 80 1 -- -- 6.7 1.8 16 16 80 10
Max.
12 4.5 350 9.6 5.6 -- -- -- -- 0.2VDD 8.7 2.3 19.2 19.2 -- 35
Unit
V V
A
12V 12V 12V 12V 12V 12V 12V -- -- 12V 12V 12V 12V 12V 12V
V V mA mA mA V V V V KHz KHz dB mV
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Trigger Timing
Note: 1. The output is activated if the trigger signal conforms to the following criteria: * More then 3 triggers within 2 seconds. * A trigger signal sustain duration 0.34 secs. * 2 trigger signals within 2 secs with one of the trigger signal sustain 0.16 secs. 2. The effective comparator output width can be selected to be 24ms or 32ms or 48ms by mask option. The default is 24ms (system frequency=16KHz). 3. The output duration is set by an external RC that is connected to the OSCD pin.
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HT761X
Functional Description
VEE RELAY (TRIAC)
VEE supplies power to the analog front end circuit with a stabilized voltage which is -4V with respect to VDD normally.
OSCS
RELAY is an output pin set as a RELAY driving (active high) output for the HT761XA, or as a TRIAC driving (active low) output for the HT761XB. The output active duration is controlled by the OSCD oscillating period.
OSCS is a system oscillator input pin. When it is connected to an external RC a system frequency of 16KHz can be generated.
HT761XA
OUTPUT
CDS
HT761XB
TRIAC
RELAY
Fig.1 System oscillator
OSCD
CDS is a CMOS schmitt trigger input structure. It is used to distinguish between day time and night time. When the input voltage of CDS is high the PIR input is enabled. On the other hand, when CDS is low the PIR input is disabled. The input disable to enable debounce time is 5 seconds. Connect this pin to VDD when not using this function. The CDS input is ignored when the output is active.
OSCD is an output timing oscillator input pin. It's connected to an external RC to obtain the desired output turn-on duration. Variable output turn-on durations can be achieved by selecting various values of RC or using a variable resistor.
CDS
LOW HIGH
Status
Day Time Night
PIR
Disabled Enabled
TD=
1 x 21504 f
Fig.2 Output timing oscillator
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HT761X
MODE ZC
MODE is a tri-state input pin used to select the operating mode.
MODE Operating Status Mode
Description
Output is always ON: RELAY outputs high for relay driving. TRIAC pulse train output is synchronized by ZC for triac driving. Output is always OFF: RELAY outputs low for relay driving. TRIAC outputs high for triac driving. Outputs remain in the off state until activated by a valid PIR input trigger signal. When working in the AUTO mode, the chip allows override control by switching the ZC signal.
ZC is a CMOS input structure. It receives AC line frequency and generates zero crossing pulses to synchronize the triac driver. By effective ZC signal switching (switch OFF/ON 1 or 2 times within 3 seconds by mask option), the chip provides the following additional functions:
* Test mode control
VDD
ON
VSS
OFF
Within 10 seconds after power-on, effective ZC switching will force the chip to enter the test mode. During the test mode, the outputs will be active for a duration of 2 seconds each time a valid PIR trigger signal is received. If a time interval exceeds 32 seconds without a valid trigger input, the chip will enter the AUTO mode automatically.
Open
AUTO
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* Override control
When the chip is working in the AUTO mode (MODE=open), the output is activated by a valid PIR trigger signal and the output active duration is controlled by the OSCD oscillating period. The lamp can be switched always to "ON" from the AUTO mode by either switching the MODE pin to VDD or switching the ZC signal by an OFF/ON operation of the power switch (OFF/ON once or twice within 3 seconds by mask option). The term "override" refers to the change of operating mode by switching the power switch. The chip can be toggled from ON to AUTO by an override operation. If the chip is overridden to ON and
there is no further override operation, it will return to AUTO automatically after an internal preset ON time duration has elapsed. This override ON time duration can be set to 4 or 6 or 8 hours by mask option. The default is 8 hours. The chip provides a mask option to decide the output flash times (3 times) when changing the operating mode. It will flash 3 times at a 1Hz rate each time the chip changes from the AUTO mode to another mode or flash 3 times at a 2Hz rate when returning to the AUTO mode. But if the AUTO mode is changed by switching the MODE switch it will not flash.
Fig.3 ZC override timing
RSTB Power on initial
RSTB is used to reset the chip. It is internal pull-high and active low. The use of CRST can extend the power-on initial time. If the RSTB pin is an open circuit (without CRST), the initial time is the default (40 secs).
The PIR signal amplifier requires a warm up period after power-on. The input should be disabled during this period. In the AUTO mode within the first 10 seconds of power-on initialization, the chip allows override control to enter the test mode. After 40 seconds of the initial time the chip allows override control between ON and AUTO. It will remain in the warm up period if the total initial time has not elapsed after returning to AUTO. In case that the ZC signal disappears more than 3 seconds, the chip will restart the initialization operation. However, the restart initial time is always 40 seconds and cannot be extended by adding CRST to the RSTB pin as shown in Fig.4.
Fig.4 RSTB application example
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Mask options
The HT761X offers mask options to select the output flash (3 times) when changing the operating mode. The chip will flash 3 times at a 1Hz rate each time it changes from AUTO to another mode and flash 3 times at a 2Hz rate when it returns to the AUTO mode. However the chip will not flash if the mode is changed by switching the MODE switch.
* 4, 6, or 8 hour options to return to AUTO from
override ON. The default is 8 hours.
* Options for effective override: Once or twice
OFF/ON operation of power switch within 3 seconds. The default is OFF/ON twice. * Options for output flash to indicate effective override operation. The default is to flash. * Options for effective PIR trigger pulse width: >24mS, >32mS or >48mS. The default is 24ms. * Options for setting comparator window to be 1 1 1 , or (VDD-VEE). The default is 16 11.3 9 1 (VDD-VEE). 16
PIR amplifier
Fig. 5 PIR amplifier stage amplifying device. The non-inverting input of OP2 is connected to the comparator's window centerpoint and can be used to check this voltage and to provide a bias voltage that is equal to the centerpoint voltage of the comparator. In Fig.5 the comparator can have 3 window 1 levels set by mask option. 1. (VDD-VEE), 2. 16 1 1 (VDD-VEE), 3. (VDD-VEE). If the win11.3 9 dow level fails to be specified the default win1 dow is set to (VDD-VEE). The preset voltage 16 of VDD-VEE is 4V. The default values of VCP 4 and VCN are therefore 0.25V, ( V ). 16
Consult the diagram below for details on the PIR front end amplifier. In Fig.5 there are 2 op-amps with different applications. OP1 can be used independently as a first stage inverting or non-inverting amplifier for the PIR. As the output of OP2 is directly connected to the input of the comparator, it is used as a second
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Second stage amplifier
Fig.6 Typical second stage amplifier Usually the second stage PIR amplifier is a simple capacitively coupled inverting amplifier with a low pass configuration. The noninverting input terminal is biased to the center point of the comparator window and the output of the second stage amplifier is directly coupled to the comparator center point. In Fig.6 OP2P is directly connected to the comparator window center, and with the C3 filter it can act as the bias for OP2. For this configuraR2 1 tion AV = , low cutoff frequency fL = , R1 2R1C1 1 high cutoff frequency fH = . By chang2R2C2 ing the value of R2 the sensitivity can be varied. C1 and C3 should be of low leakage types to prevent the DC operating point from change due to current leakage. Each op-amp current consumption is approximately 5A with the op-amps and comparator's working voltage all provided by the regulator. Consult the following diagrams for typical PIR front end circuit.
First stage of PIR amplifier
Fig.7 and Fig.8 are similar but in Fig.8 the input signal of amplifier is taken from the drain of the PIR. This has higher gain than that in Fig.7. Since OP1 is a PMOS input VD has to be greater than 1.2V for adequate operation.
Fig. 7 Typical first-stage PIR
Fig.7 shows a typical first stage amplifier. C2 and R2 form a simple low pass filter with cut off frequency at 7Hz. The low frequency response is governed by R1 and C1 with cut-off frequency at 0.33Hz. A V=
( R1+ R2 ) R1
Fig.8 High gain first stage
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Application Circuit
HT761XA relay application
Note: 1. Adjust R13 to fit various CDS. 2. Change C6 to obtain the desired adjusting range of output duration. 3. Change the value of C11 to 0.33F/600V for AC 220V application.
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HT761X
HT761XB triac application
Note: 1. Adjust R10 to fit various CDS. 2. Change C7 to obtain the desired adjusting range of output duration. 3. Change the value of C10 to 0.15F/600V for AC 220V application.
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